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Comprehensive Assessment of FinFET Technology for Extending Moores Law to Nanoscale Devices

. Mohit Shukla, Pawan Srivastava, Ram Chandra Singh Chauhan MTech, Microelectronics, Institute of Engineering and Technology, Lucknow, India -226021. Associate Professor, ECE Department, Institute of Engineering and Technology, Lucknow, India -22602


Downscaling has been the constant need of the hour for the past two decades to realize low power, high speed and high-density devices. Until higher technology nodes came into the scene, the planar CMOS structures were offering better performance but the limitations started setting in with the progression towards lower nodes. In order to resolve this obstacle, FinFET based devices were proposed as they possess multiple Gate structure resulting in better control over the channel region and hence, charge carriers. This paper discusses the limitations of planar CMOS technology which paved the way for the advent of FinFETs. A literature review of the studies carried out on FinFETs in the past twenty years have also been presented along with a comparative analysis on FinFET based SRAM circuits.


Index Terms- short channel effects, FinFET, CMOS, scaling, SRAM

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